Lossless snubber circuit and operation method thereof
US9762118B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 2, 2013 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | Apr 17, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/155
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a lossless snubber circuit and an operation method thereof. The lossless snubber circuit includes a first snubber circuit. The first snubber circuit includes a first diode (D7) and a capacitor (C3). The capacitance of the capacitor (C3) is big enough so that a voltage spike generated at the moment when a switch transistor (Q1) is turned off is depressed by charging the capacitor (C3). When the switch transistor (Q1) is on, the electric charges released by the capacitor (C3) are directed to a first capacitor (C1) in a three-phase Vienna structure, so as to avoid the problem of voltage stress difference caused by the large quantity of electric charges released by the capacitor (C3) flowing back to the switch transistor (Q1).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.