Shift register, gate integrated driving circuit and display screen
US9766741B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 10, 2014 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Feb 20, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a shift register, a gate integrated driving circuit and a display screen. In the shift register, a connection point between the source of the first thin film transistor (T1) and the drain of the second thin film transistor (T2) is set as the first pulling-up node (PU1), a connection point between the capacitor (C1) and the gate of the third thin film transistor (T3) is set as the second pulling-up node (PU2), and the leakage-proof module is added between the first pulling-up node (PU1) and the second pulling-up node (PU2). The leakage-proof module is configured to, under the control of the display control signal terminal (CTI): conduct the path between the first pulling-up node (PU1) and the second pulling-up node (PU2) during the display period in a frame, so that the shift register can output a normal gate-on signal; and disconnect the path between the first pulling-up node (PU1) and the second pulling-up node (PU2) during the touch period in the frame, which is equivalent to connecting a resistor having a large resistance in a discharging path of the capacitor (C1) in series, so that the discharging of the capacitor (C1) can be slowed greatly, and a leakage sp…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.