Patent · US Active

System and method for validating program execution at run-time

US9767271B2 · kind B2 · utility

95Cited by
1,126References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 28, 2015
Grant dateSep 19, 2017
Priority date
Expiry dateDec 28, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/3612
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A pipelined processor comprising a cache memory system, fetching instructions for execution from a portion of said cache memory system, an instruction commencing processing before a digital signature of the cache line that contained the instruction is verified against a reference signature of the cache line, the verification being done at the point of decoding, dispatching, or committing execution of the instruction, the reference signature being stored in an encrypted form in the processor's memory, and the key for decrypting the said reference signature being stored in a secure storage location. The instruction processing proceeds when the two signatures exactly match and, where further instruction processing is suspended or processing modified on a mismatch of the two said signatures.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.