Low temperature poly-silicon thin film transistor and fabrication method thereof, array substrate and display device
US9768308B2 · kind B2 · utility
2Cited by
3References
14Claims
0Family size
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Key dates
| Filing date | Mar 18, 2015 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Mar 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low temperature poly-silicon thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The method comprises: S1: sequentially forming an active layer (3), a gate insulation layer (4), a gate electrode (5) and an interlayer insulation layer (6) on a base substrate (1); S2: forming a first metal thin film layer (8); S3: performing a hydrogenation treatment on the active layer (3) and the gate insulation layer (6); S4: forming a second metal thin film layer (7), the second metal thin film layer (7) being used for forming a source electrode and a drain electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.