Electronic circuits
US9768782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2014 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Jul 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic circuit comprises: an input terminal; an output terminal; first and second supply rails; first, second, third, and fourth field effect transistors, FETs, each of a first type and each having respective gate, source and drain terminals; and first and second loads. The source of the first FET is connected to the first supply rail, the drain of the first FET and the source of the second FET are connected to the output terminal, the drain of the second FET is connected to the second supply rail, the gate of the third FET and the gate of the fourth FET are connected to the input terminal, the drain of the third FET is connected to the second supply rail, the first load is connected between the first supply rail and the source of the third FET, and the second load is connected between the drain of the fourth FET and the second supply rail. In one aspect of the invention, the gate of the first FET is connected to a node between the source of the third FET and the first load such that a voltage at the source of the third FET is applied to the gate of the first FET, and the gate of the second FET is connected to a node between the drain of the fourth FET and the second load su…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.