Multi-stage equalization
US9772378B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 28, 2014 |
| Grant date | Sep 26, 2017 |
| Priority date | — |
| Expiry date | Mar 14, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31905
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An example apparatus for interfacing between automatic test equipment (ATE) and a device under test (DUT) includes: multiple stages arranged in sequence between the ATE and the DUT, where each of the multiple stages includes a driver, at least two of the multiple stages each includes a filter, each filter is arranged between two drivers, and each filter is configured to reduce jitter produced by a preceding driver in a signal transmitted between the ATE and the DUT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.