Method for realizing heterogeneous III-V silicon photonic integrated circuits
US9772447B2 · kind B2 · utility
8Cited by
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15Claims
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Key dates
| Filing date | May 6, 2016 |
| Grant date | Sep 26, 2017 |
| Priority date | — |
| Expiry date | May 6, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/01708
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of producing a heterogeneous photonic integrated circuit includes integrating at least one III-V hybrid device on a source substrate having at least a top silicon layer, and transferring by transfer-printing or by flip-chip bonding the III-V hybrid device and at least part of the top silicon layer of the source substrate to a semiconductor-on-insulator or dielectric-on-insulator host substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.