Patent · US Active

Method for realizing heterogeneous III-V silicon photonic integrated circuits

US9772447B2 · kind B2 · utility

8Cited by
0References
15Claims
0Family size

Assignees

Inventors

Key dates

Filing dateMay 6, 2016
Grant dateSep 26, 2017
Priority date
Expiry dateMay 6, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG02F1/01708
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

A method of producing a heterogeneous photonic integrated circuit includes integrating at least one III-V hybrid device on a source substrate having at least a top silicon layer, and transferring by transfer-printing or by flip-chip bonding the III-V hybrid device and at least part of the top silicon layer of the source substrate to a semiconductor-on-insulator or dielectric-on-insulator host substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.