Multi-layer full dense mesh
US9773727B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2016 |
| Grant date | Sep 26, 2017 |
| Priority date | — |
| Expiry date | Jun 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/0401
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-layer full dense mesh (MFDM) device. The MFDM may include a metal-top layer including a bump pad array that may include a power1 (PWR1) bump pad within a PWR1 bump region, a VSS bump pad within a VSS bump region, and a power2 (PWR2) bump pad within a PWR2 bump region. The metal-top layer may also include a PWR1 majority metal-top region. The MFDM may also include a metal-top-1 layer beneath the metal-top layer and including a VSS majority metal-top-1 region, a PWR1 metal-top-1 region, and a PWR2 metal-top-1 region. The MFDM may also include a metal-top-2 layer beneath the metal-top-1 layer and including a PWR2 majority metal-top-2 region, a VSS metal-top-2 region, and a PWR1 metal-top-2 region. The MFDM may also include top-1 VIAs disposed between the metal-top layer and the metal-top-1 layer, and top-2 VIAs disposed between the metal-top-1 layer and the metal-top-2 layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.