Gate driver and display device including the same
US9774325B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2015 |
| Grant date | Sep 26, 2017 |
| Priority date | — |
| Expiry date | Jan 4, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0214
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver and a display device including the gate driver are provided which can prevent an abnormal output of a gate-high voltage from a stage by stably maintaining a discharge potential of a pull-up node. The gate driver includes a plurality of stages, and each stage includes a pull-up transistor that outputs a clock signal input to a first clock terminal to an output terminal depending on a voltage of a pull-up node; a pull-down transistor that outputs a first source voltage input to a first source voltage terminal to the output terminal depending on a voltage of a pull-down node; and a first noise removing unit that supplies a gate-off voltage to the pull-up node to remove noise of the pull-up node in response to the clock signal input to the first clock terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.