Counter circuit
US9774333B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 14, 2015 |
| Grant date | Sep 26, 2017 |
| Priority date | — |
| Expiry date | Jan 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/542
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A counter circuit includes a first Johnson counter circuit and a second Johnson counter circuit coupled in cascade. Each Johnson counter circuit includes a clock input, a data input, a first clock data output, a second clock data output and a feedback from the second clock data input to first data input. The clock input of the first Johnson counter circuit is configured to receive an input clock signal. The clock input of the second Johnson counter circuit is connected to the second clock data output of the first Johnson counter circuit. A ripple counter circuit has a clock input and additional clock data outputs. The clock input of the ripple counter circuit is connected to the second clock data output of the preceding Johnson counter circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.