Array substrate, display panel and display device
US9778517B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 17, 2015 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Jul 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/121
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes a substrate, a plurality of gate lines and a plurality of data lines intersecting the gate lines and insulated from the gate lines. The intersections of the gate lines and data lines define a plurality of pixel units, each of the pixel units comprise a first electrode and a second electrode laminated, with the second electrode having at least one branch electrode, and the first electrode having at least one first slit disposed between the pixel units and extending in a direction of the data lines. In the array substrate, the display panel and the display device, the electrode under the black matrix is removed by hollowing out to reduce the electric field strength under the black matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.