Array substrate, liquid crystal display panel and liquid crystal display device
US9778523B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 5, 2016 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Apr 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2202/104
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate, a liquid crystal display panel and a liquid crystal display device of the present disclosure provided are designed to form a MIS storage capacitor by the polycrystalline semiconductor layer, the first metal layer and the insulating layer between the two or the polycrystalline semiconductor layer, the second metal layer and the insulating layer between the two. When one side of the first metal layer or the second metal layer is receiving the negative gray scale voltage, a P—Si in the polycrystalline semiconductor layer will gather to form a cavity, when receiving the positive gray scale voltage, a blocking layer will be formed on the P—Si to reduce the capacity of the MIS storage capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.