Calibrating charge mismatch in a baseline correction circuit
US9778804B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2015 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Aug 21, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments provide a processing module that calibrates a current-mode baseline correction system to account for features in an input device that lead to “offset” in output of a charge integrator used for sensing presence of an input object. The offset is a difference between a common mode voltage, which is the average voltage output of the charge integrator over a sensing cycle and a mid-rail voltage midway between high and low power supply voltages. Calibration is performed by adjusting an N-side and/or P-side current flow duration parameter until common mode voltage falls within a low offset window in which the offset is deemed to be sufficiently close to the mid-rail voltage. The resulting duration parameters are stored and used for current-mode baseline corrections when operating an associated sensor electrode for capacitive sensing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.