Memory check, abnormality threshold count, and reset in an onboard electronic control unit
US9778970B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2013 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Apr 10, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is an onboard electronic control unit. A CPU regularly performs a memory check and, if a determination has been made that there is an error in the memory content, writes the number of times an error has been determined to an error count storage unit, and resets itself. Immediately after the CPU has been reset and before the first memory check is performed, an error determination unit determines whether or not the error count stored in the error count storage unit is at least an error determination threshold. If the error count is at least the error determination threshold, an error response unit causes the CPU to execute a specific error response program, out of the programs in the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.