Shift register unit, gate driving circuit and display apparatus
US9779680B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 12, 2013 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Aug 12, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
There are provided a shift register unit, a gate driving circuit and a display apparatus, which are configured to suppress interference noise due to a change of an alternating current clock signal and enhance stability of the shift register unit. The shift register unit comprises: an input module configured to charge a pull-up node in response to the input signal; a pull-down module configured to provide the low voltage signal to the pull-up node and the output terminal in response to a voltage signal of the pull-down node; a pull-down driving module configured to charge a pull-down node in response to the first clock signal and the second clock signal and discharge the pull-down node in response to the voltage signal of the pull-up node; an output module configured to provide a first clock signal to an output terminal in response to a voltage signal of the pull-up node; and a reset module configured to discharge the output terminal in response to the second clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.