Method of manufacturing element chip, method of manufacturing electronic component-mounted structure, and electronic component-mounted structure
US9780021B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2017 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Jan 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15323
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To provide a method of manufacturing an element chip in which creep-up of a conductive material can be suppressed in a mounting step. In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate which has a plurality of element regions and of which an element surface is covered by an insulating film, the substrate is divided into the element chips by exposing the substrate to a first plasma, the element chips having a first surface, a second surface, and a side surface are held spaced from each other on a carrier, and the side surface and the insulating film are in a state of being exposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.