Array substrate, display panel and display device
US9780122B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 23, 2015 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Sep 23, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/134372
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate, a display panel and a display device are provided. The array substrate includes: a substrate, wherein a signal transmission line, a first insulator layer, a second insulator layer, a pixel electrode layer and a common electrode layer are disposed on the substrate, wherein the first insulator layer is disposed between the signal transmission line and the common electrode layer, and the second insulator layer is disposed between the pixel electrode layer and the common electrode layer, and wherein a dielectric constant of the first insulator layer is less than or equal to a dielectric constant of the second insulator layer, and the signal transmission line is electrically connected with the common electrode layer. A parasitic capacitance between the signal transmission line and the common electrode layer is reduced in the array substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.