Semiconductor device with multi-function P-type diamond gate
US9780181B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2016 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Dec 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/343
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a back-barrier layer arranged on the substrate, the back-barrier layer including first p-type dopant atoms, an intermediate or nucleation layer having a lattice constant different from a lattice constant of the back-barrier layer, a semiconductor heterostructure having a channel layer, a spacer layer on the channel layer and a barrier layer on the spacer layer, wherein a combination of materials of the barrier layer, the spacer layer and the channel layer is selected such that a carrier charge is provided to the channel layer, a gate layer arranged to partially cover a top of the barrier layer, wherein the gate layer includes second p-type dopant atoms, and a set of electrodes for providing and controlling the carrier charge in the carrier channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.