System and method for enabling high read rates to data element lists
US9785367B2 · kind B2 · utility
1Cited by
10References
24Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 24, 2016 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Jun 24, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system for a network device is described. The memory system includes a main memory configured to store one or more data elements. Further, the memory system includes a link memory that is configured to maintain one or more pointers to interconnect the one or more data elements stored in the main memory. The memory system also includes a free-entry manager that is configured to generate an available bank set including one or more locations in the link memory. In addition, the memory system includes a context manager that is configured to maintain metadata for a list of the one or more data elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.