Patent · US Active

Methods and apparatus to eliminate partial-redundant vector loads

US9785413B2 · kind B2 · utility

2Cited by
0References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 16, 2015
Grant dateOct 10, 2017
Priority date
Expiry dateJun 16, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/3688
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods, apparatus, systems and articles of manufacture are disclosed to eliminate partial-redundant vector loads. An example apparatus includes a node group to associate a vector operation with a node group based on a load type of the vector operation. The example apparatus also includes a candidate identifier to identify a candidate in the node group, the candidate to include a subset of vector operations of the node group. The example apparatus also includes a code optimizer to determine replacement code based on a characteristic of the candidate, and to compare an estimated cost associated with executing the replacement code to a threshold cost relative to a cost of executing the candidate. The example apparatus also includes a code generator to generate machine code using the replacement code when the estimated cost of executing the replacement code satisfies the threshold cost.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.