Memory access method, buffer scheduler and memory module
US9785551B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2015 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Dec 10, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/2532
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a memory access method, a buffer scheduler, and a memory module, which can support multiple application scenarios without changing the memory module or a memory chip. The method includes: receiving an operation request message for memory access data, where the operation request message includes tag information of the memory access data, operation information of the memory access data, and a memory address of the memory access data; and performing, according to at least one of the tag information of the memory access data, a memory address of the memory access data, and the operation information of the memory access data, an operation on the tag of the memory access data and/or the memory access data stored in the memory module. The present invention is applicable to the computer field.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.