Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation

US9786339B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Paul A. Bunce · Poughkeepsie, US
• Yuen H. Chan · Poughkeepsie, US
• John D. Davis · Gloucester, GB
• Silke Penth · Holzgerlingen, DE
• David Edward Schmitt · Rochester, US
• Tobias Werner · Holzgerlingen, DE
• Brian James Yavoich · Highland, US

Key dates

• Filing date: Feb 24, 2016
• Grant date: Oct 10, 2017
• Expiry date: Feb 24, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2207/2227
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A system for dual mode operation having power saving and active modes in a stacked circuit topology having logic preservation is provided. The system includes a pre-charge circuit and a sleep mode control circuit for providing a signal to disable a plurality of circuit elements and switching a mode of the system, the sleep mode control circuit being coupled to the pre-charge circuit and further being coupled to a logic function circuit, wherein the plurality of circuit elements comprise logic gates and transistor devices. The system also includes a keeper circuit coupled to the global bitline, and the logic function circuit coupled to a solar bitline, wherein the logic function circuit preserves a state of the solar bitline, the state of the global bitline determines the state of the solar bitline. The system includes an effective pull-up transistor coupled to the sleep mode control circuit and the logic function circuit.