Memory circuit and data processing system
US9786362B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2016 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Aug 26, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2236
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory circuit comprises an array of data storage elements; access circuitry to access a data bit, stored by a data storage element enabled for access, by an access signal for that data storage element; and control circuitry to enable groups of data storage elements for access, the groups having a group size, the group size being one or more, the access signals for data storage elements in a group being combined to provide a combined access signal common to that group of data storage elements; the control circuitry being configured to selectively operate in at least a first mode and a second mode, the group size in the first mode being different to the group size in the second mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.