Level-shifter circuit for low-input voltages
US9787310B2 · kind B2 · utility
0Cited by
34References
20Claims
0Family size
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Key dates
| Filing date | Dec 17, 2014 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Feb 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a method may include receiving an input signal at an input stage of a circuit and amplifying the input signal using an amplifier of the circuit to produce a level-shifted output signal. The method may further include selectively controlling switches of an active load coupled to the input stage based on the level-shifted output signal to turn off current flow between transitions in the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.