Gate driver on array circuit and liquid crystal display adopting the same
US9792871B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2015 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Apr 10, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A GOA circuit includes GOA circuit units. When scan signal outputted by a previous stage GOA circuit unit and a next stage GOA circuit unit are at a low level, a fifth transistor controlled by the scan signal of previous stage GOA circuit unit and a sixth transistor controlled by the scan signal of a next stage GOA circuit unit turn on, so that the current stage GOA circuit unit starts to operate, and voltage of a control node becomes the same as the first constant voltage. When a third clock signal is triggered, the scan signal of the previous stage GOA circuit unit is charged from the low level, which was maintained previously, to the first constant voltage. Therefore, scan signal of GOA circuit unit will not affect the normal stage transmission of other GOA circuit units, and mitigate the problem of outputting redundant scan signal pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.