Method and apparatus for an active negative-capacitor circuit to cancel the input capacitance of comparators
US9793885B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 1, 2016 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Nov 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0836
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator. The amplifiers may be abutted to one another such that an active transistor of a first differential stage in a first amplifier behaves as a dummy transistor for an adjacent differential stage in a second amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.