Patent · US Active

Device and method for recovering clock and data

US9793903B1 · kind B1 · utility

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1References
18Claims
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Key dates

Filing dateSep 13, 2016
Grant dateOct 17, 2017
Priority date
Expiry dateSep 13, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L7/033
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A clock and data recovery device includes a data sampling module, a phase detection circuit, a frequency estimator, a clock generation module, and a data recovery module. The data sampling module samples input data according to first clock signals to generate data values, in which phases of the first clock signals are different from one another. The phase detection circuit detects a phase error of the input data according to at least one second clock signal, to generate an error signal. The frequency estimator generates an adjustment signal according to the error signal, a phase threshold value, and a frequency threshold value. The clock generation module generates the first clock signals and the at least one second clock signal according to the adjustment signal and a reference clock signal. The data recovery module generates recovered data corresponding to the input data according to the data values.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.