Analog-to-digital conversion circuitry with real-time adjusted gain and resolution
US9793912B1 · kind B1 · utility
12Cited by
15References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 27, 2016 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Dec 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Analog-to-digital conversion circuitry for generating a digital output signal is disclosed comprising a sample-and-hold circuit comprising an adjustable sample capacitor for coupling to an analog input signal during a sample phase, and an analog-to-digital converter (ADC) coupled to an output of the sample-and-hold circuit during a hold phase. In order to compensate in real-time for an increase in an amplitude of the input signal, a capacitance of the sample capacitor is decreased by an attenuation factor, and an output of the ADC is multiplied by an inverse of the attenuation factor to generate the digital output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.