Multiplexed tamper detection system
US9799180B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2016 |
| Grant date | Oct 24, 2017 |
| Priority date | — |
| Expiry date | Apr 3, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07F19/2055
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A payment reader includes a tamper detection system for monitoring and protecting against attempts to tamper with the payment reader. The tamper detection system includes tamper detection devices such as tamper switches or tamper meshes, and tamper detection circuitry to control and interface with the tamper detection devices. Pulses are selectively provided from each of a plurality of tamper signal pins of the tamper detection circuitry to an associated tamper detection device, the outputs of the tamper detection devices are multiplexed, the multiplexed signal is received at a tamper detection pin, and a tamper attempt is identified if a pulse was not received within the multiplexed signal. While not transmitting, each of the tamper signal pins is switched to an input state, and a tamper attempt is also identified if any aberrant signal is received at the tamper signal pins while in the input state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.