Method of manufacturing a three-dimensional semiconductor memory device
US9799657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2014 |
| Grant date | Oct 24, 2017 |
| Priority date | — |
| Expiry date | Jun 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The inventive concepts provide methods of manufacturing a semiconductor device. The method includes forming a thin layer structure including insulating layers and sacrificial layers alternately and repeatedly stacked on a substrate, forming a through-hole penetrating the thin layer structure and exposing the substrate, forming a semiconductor layer covering an inner sidewall of the through-hole and partially filling the through-hole, oxidizing a first portion of the semiconductor layer to form a first insulating layer, and injecting oxygen atoms into a second portion of the semiconductor layer. An oxygen atomic concentration of the second portion is lower than that of the first insulating layer. Oxidizing the first portion and injecting the oxygen atoms into the second portion are performed using an oxidation process at the same time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.