Method for manufacturing active-matrix display panel, and active-matrix display panel
US9799687B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 10, 2015 |
| Grant date | Oct 24, 2017 |
| Priority date | — |
| Expiry date | Jun 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/123
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Manufacturing method including forming, over substrate, TFT layer, planarization layer, and display element in this order. Forming of TFT layer involves forming passivation layer to cover TFT layer electrode, such as upper electrode, and to come in contact with planarizing layer. Forming of display element involves forming bottom electrode to come in contact with planarizing layer. TFT layer electrode and bottom electrode are connected by: first forming, in planarizing layer, first contact hole exposing passivation layer at bottom thereof; then forming second contact hole exposing TFT layer electrode at bottom thereof through dry-etching passivation layer exposed at bottom of first contact hole using fluorine-containing gas; then forming liquid repellent film containing fluorine on passivation layer inner surface facing second contact hole; and forming bottom electrode along planarizing layer inner surface and passivation layer inner surface respectively facing first contact hole and second contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.