Patent · US Active

Process for manufacturing a photonic circuit with active and passive structures

US9799791B2 · kind B2 · utility

3Cited by
4References
19Claims
0Family size

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Key dates

Filing dateJan 13, 2015
Grant dateOct 24, 2017
Priority date
Expiry dateNov 6, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10F77/413
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

A process for manufacturing a photonic circuit comprises: manufacturing on a first wafer a first layer stack comprising an underclad oxide layer and a high refractive index waveguide layer; patterning the high refractive index waveguide layer to generate a passive photonic structures; planarizing the first layer stack with a planarizing oxide layer having a thickness below 300 nanometers above the high refractive index waveguide layer; annealing the patterned high refractive index waveguide layer before and/or after the planarizing oxide layer; manufacturing on a second wafer a second layer stack comprising a detachable mono-crystalline silicon waveguide layer; transferring and bonding the first layer stack and the second layer stack; manufacturing active photonic devices in the mono-crystalline silicon waveguide layer; and realizing evanescent coupling between the mono-crystalline silicon waveguide layer and the high refractive index waveguide layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.