Method and device for generating an adjustable bandgap reference voltage
US9804631B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2016 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Aug 22, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/30
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A circuit includes a first PMOS transistor that includes a first PMOS source coupled to a first input node, a first PMOS gate, and a first PMOS drain. A second PMOS transistor includes a second PMOS source coupled to a second input node, a second PMOS gate, and a second PMOS drain coupled to the second PMOS gate. A first resistor coupled between the first PMOS source and a ground node. A first diode element coupled between the first resistor and the ground node and a second diode element coupled between the second PMOS source and the ground node. A third PMOS transistor includes a third PMOS gate, a third PMOS source coupled to a supply node, and a third PMOS drain coupled to the first input node. A fourth PMOS transistor includes a fourth PMOS gate coupled to the third PMOS gate, a fourth PMOS source coupled to the supply node, and a fourth PMOS drain coupled to the second input node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.