Rank and page remapping logic in a volatile memory
US9804920B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2015 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Oct 21, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/408
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the inventive concept include a plurality of memory ranks, a buffer chip including a rank remap control section configured to remap a rank from among the plurality of memory ranks of the volatile memory module responsive to a failure of the rank, and a dynamic serial presence detect section configured to dynamically update a stated total capacity of the volatile memory module based at least on the remapped rank. In some embodiments, a memory module includes a plurality of memory ranks, an extra rank in addition to the plurality of memory ranks, the extra rank being a spare rank configured to store a new page corresponding to a failed page from among the plurality of ranks, and a buffer chip including a page remap control section configured to remap the failed page from among the plurality of ranks to the new page in the extra rank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.