Scan driving circuit and NOR gate logic operation circuit thereof
US9805679B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 28, 2015 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Feb 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0291
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The disclosure is related to a scan driving circuit for an oxide semiconductor thin film transistor and the NOR gate logic operation circuit thereof. The NOR gate logic operation circuit includes a first invertor and a second invertor applied in the pull down holding circuit of the GOA circuit, and a plurality of transistors. The combination of the NTFT and the invertor displaces the original function of the PMOS element to realize a characteristic similar to an original COMS NOR operation circuit, thereby solving a design problem of the logic operation circuit using a IGZO TFT single element, such that a larger scale digital integrated circuit is further suitably integrated into the liquid crystal display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.