Method of manufacturing silicon carbide semiconductor device
US9805944B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 28, 2017 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Feb 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/159
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A p-type base region, n+-type source region, p+-type contact region, and n-type JFET region are formed on a front surface side of a silicon carbide base by ion implantation. The front surface of the silicon carbide base is thermally oxidized, forming a thermal oxide film. Activation annealing at a high temperature of 1500 degrees C. or higher is performed with the front surface of the silicon carbide base being covered by the thermal oxide film. The activation annealing is performed in a gas atmosphere that includes oxygen at a partial pressure from 0.01 atm to 1 atm and therefore, the thermal oxide film thickness may be maintained or increased without a decrease thereof. The thermal oxide film is used as a gate insulating film and thereafter, a poly-silicon layer that is to become a gate electrode is deposited on the thermal oxide film, forming a MOS gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.