Vertical structure having an etch stop over portion of the source
US9805968B2 · kind B2 · utility
3Cited by
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20Claims
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Assignee
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Key dates
| Filing date | Feb 13, 2017 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Feb 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26566
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to an exemplary embodiment, a method of forming a semiconductor device is provided. The method includes: providing a vertical structure over a substrate; forming an etch stop layer over the vertical structure; forming an oxide layer over the etch stop layer; performing chemical mechanical polishing on the oxide layer and stopping on the etch stop layer; etching back the oxide layer and the etch stop layer to expose a sidewall of the vertical structure and to form an isolation layer; oxidizing the sidewall of the vertical structure and doping oxygen into the isolation layer by using a cluster oxygen doping treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.