Patent · US Active

Integrated circuit with power saving feature

US9806019B2 · kind B2 · utility

0Cited by

5References

13Claims

0Family size

Assignee

NXP USA, Inc. · US

Inventors

Anis M. Jarrar · Austin, US
David Russell Tipple · Leander, US
Jeff L. Warner · Austin, US

Key dates

Filing date	Sep 22, 2015
Grant date	Oct 31, 2017
Priority date	—
Expiry date	Sep 22, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/06
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An integrated circuit includes a first transistor including a first current electrode, a second current electrode, and a bulk tie; a first conductive line coupled between the first current electrode and a first supply voltage; and a second conductive line coupled to the second current electrode. A resistance of the second conductive line is at least 5 percent greater than a resistance of the first conductive line. The bulk tie is coupled to a second supply voltage. The first supply voltage is different than the second supply voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.