Semiconductor devices and methods of manufacturing the same
US9806080B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2015 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Jun 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a memory structure and a capacitor structure including at least one array of capacitors. The memory structure is disposed in a first region of the device. The capacitor structure is disposed in a second region of the device. The capacitor structure may include a first capacitor array, a second capacitor array, a third capacitor array and a first landing pad. The first landing pad is disposed between the substrate and lower electrodes of capacitors of the first and second capacitor arrays, and contacts the lower electrodes so as to electrically connect the first capacitor array and the second capacitor array. Upper electrodes of capacitors of the second and third capacitor arrays are integral such that the second capacitor array and the third capacitor array are electrically connected to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.