Multilevel inverter device and method
US9806529B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2016 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Jul 28, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/56
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An inverter comprises a first boost apparatus having an input coupled to a positive dc bus, a second boost apparatus having an input coupled to a negative dc bus, a first switch coupled to an input of an L-C filter and the first boost apparatus, a second switch coupled to the input of the L-C filter and the second boost apparatus, a third switch coupled between the positive dc bus and the first switch, wherein a common node of the first switch and the third switch is directly connected to an output of the first boost apparatus, a fourth switch coupled between the negative dc bus and the second switch, wherein a common node of the fourth switch and the second switch is directly connected to an output of the second boost apparatus and an isolation switch coupled between the input of the L-C filter and ground.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.