High-linearity CMOS WiFi RF power amplifiers in wide range of burst signals
US9806679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2015 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | Sep 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.