Burst mode clock data recovery device and method thereof
US9806879B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2016 |
| Grant date | Oct 31, 2017 |
| Priority date | — |
| Expiry date | May 19, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A burst mode clock data recovery device includes a clock data recovery loop, a frequency tracking loop, a frequency tracking loop, and a fast-locking unit. The clock data recovery loop receives a sampling clock signal and a data signal and uses the sampling clock signal to lock the data signal to generate a recovery clock signal. The frequency tracking loop tracks a frequency of the recovery clock signal to generate a frequency detection signal associated with the recovery clock signal. The phase lock loop receives the frequency detection signal and locks the recovery clock signal in a reference clock. The fast-locking unit generates a fast-locking signal according to the recovery clock signal and a first phase detection signal to allow the clock data recovery loop to quickly lock the data signal after the transition from a stall mode to the burst mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.