Montgomery multiplication method for performing final modular reduction without comparison operation and montgomery multiplier
US9811318B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2015 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | Oct 11, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5338
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Montgomery multiplier includes a partial product computing unit for multiplying a multiplicand and a multiplier; a modulus reduction computing unit for performing a multiplication of a modulus and a quotient that reflects a quotient sign; an accumulation unit for accumulating in a intermediate value an output value of the partial product computing unit and an output value of the modulus reduction computing unit from a previous cycle; a quotient computing unit for receiving an accumulation value of the accumulation unit during a current cycle and calculating a quotient sign to be used during a next cycle; and a quotient sign determination unit for determining a quotient sign to be used during a next cycle from the multiplicand, the multiplier and the quotient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.