Bandwidth reduction using vertex shader
US9811940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2015 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | Dec 28, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In graphics rendering, a texture tile is divided into a plurality of partitions, each partition having a plurality of vertices. A map indicates, for each partition, whether each partition comprises a constant color. Then the plurality of vertices are transferred to a vertex shader, which determines that at least one of the partitions comprises a constant color partition. A vertex shader applies a vertex transformation that associates a set of texel coordinates from the texture tile to each of the vertices of the constant color partition to generate a set of associated texel coordinates. A first coordinate of the set of associated texel coordinates is set to zero. A pixel shader interpolates the associated texel coordinates to generate an interpolated value and accesses a single texel in the constant color partition that corresponds to the interpolated value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.