Method of forming fine pattern of semiconductor device
US9812335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2016 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | Mar 19, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76816
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device is disclosed. The method may include forming an target layer on a substrate, forming a mask pattern on a target layer, performing a first process to etch the target layer and form a first sub-trench, and performing a second process to further etch the target layer and form a second sub-trench. First and second sidewall patterns may be formed on a sidewall of the mask pattern to be used as an etch mask in the first and second processes, respectively. Outer sidewalls of the first and second sidewall patterns may be formed to have different angles with respect to a top surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.