Method of manufacture for a silicon-on-plastic semiconductor device with interfacial adhesion layer
US9812350B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 19, 2015 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | May 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/13022
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a polymer substrate and an interfacial layer over the polymer substrate. A buried oxide layer resides over the interfacial layer, and a device layer with at least a portion of a field effect device resides over the buried oxide layer. The polymer substrate is molded over the interfacial adhesion layer and has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity greater than 1012 Ohm-cm. Methods of manufacture for the semiconductor device include removing a wafer handle to expose a first surface of the buried oxide layer, disposing the interfacial adhesion layer onto the first surface of the buried oxide layer, and molding the polymer substrate onto the interfacial adhesion layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.