Patent · US Active

Secure migratable architecture having improved performance features

US9817580B2 · kind B2 · utility

0Cited by
2References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 19, 2016
Grant dateNov 14, 2017
Priority date
Expiry dateJul 16, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/151
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods and systems for implementing a secure migratable architecture having improved performance features over existing virtualization systems are disclosed. One method includes allocating a portion of a memory for use by a process, the process including a firmware environment representing a virtual computing system having a second computing architecture different from a first computing architecture of a computing system on which the process is executed. The method includes associating area descriptors with each of a plurality of memory areas within the portion of the memory used by the process, and receiving a request within the firmware environment to store data within a first memory area of the plurality of memory areas, the first memory area defined by a first area descriptor of the area descriptors, the request being associated with a plurality of memory addresses within the first memory area. The method includes, in response to the request, performing a check on a tag associated with the first memory area and stored in the first area descriptor. The method further includes, upon completion of the check, storing the data within the first memory area without performing a separ…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.