Structure and formation method for chip package
US9818720B2 · kind B2 · utility
48Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2015 |
| Grant date | Nov 14, 2017 |
| Priority date | — |
| Expiry date | Dec 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures and formation methods of a chip package are provided. The chip package includes a first chip structure and a second chip structure. Heights of the first chip structure and the second chip structure are different. The chip package also includes a package layer covering sidewalls of the first chip structure and sidewalls of the second chip structure. Top surfaces of the first chip structure and the second chip structure are not covered by the package layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.