Three-dimensional ferroelectric FET-based structures
US9818848B2 · kind B2 · utility
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24Claims
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Key dates
| Filing date | Apr 27, 2016 |
| Grant date | Nov 14, 2017 |
| Priority date | — |
| Expiry date | Apr 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/701
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Exemplary embodiments of the present disclosure are directed to three-dimensional (3D) Ferroelectric-gated FET (FeFET) structures that can be used to implement circuitry include memory cells, memory arrays, and/or other logic-based circuitry. For example, in exemplary embodiments, 3D FeFET AND memory arrays with vertical and horizontal channel structures are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.