Low capacitance transient voltage suppressor
US9819176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2014 |
| Grant date | Nov 14, 2017 |
| Priority date | — |
| Expiry date | Feb 17, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A low capacitance transient voltage suppressor is disclosed. The transient voltage suppressor comprises a first diode with a first anode thereof coupled to an I/O port. A first cathode of the first diode and a second cathode of a second diode are respectively coupled to two ends of a resistor. A second anode of the second diode is coupled to a low-voltage terminal. A third anode and a third cathode of a third diode are respectively coupled to the second cathode and the resistor. The third diode induces a third parasitic capacitance smaller than a first capacitance of the first diode and a second parasitic capacitance of the second diode, and the third parasitic capacitance in series with the first and second parasitic capacitances dominate a small capacitance in a path during normal operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.